Senior Analog Design & Layout Engineer (Microelectronic Commons)
(OOJ - 42577)
Active
02/01/2026 (8 days ago)
Los Angeles
California, USA
Recruiter
Paul Reino
Firm Name
AccurIT Staffing Corporation InfoConsiderationsApplications Job Details
Job Id
OOJ - 42577
Job Title
Senior Analog Design & Layout Engineer (Microelectronic Commons)
Status
Active
Member Firm
AccurIT Staffing Corporation
Recruiter
Paul Reino
Industry(ies)
Electronics/ Semi-conductors
Primary Skills
analog circuit design, eda
Secondary Skills
cadence virtuoso, cadence virtuoso layout editor, mentor graphics
Occupational Categories
Engineering/ Manufacturing/ Production/ Operations
Country
USA
State/Province
California
City
Los Angeles, CA
Work Experience (Years)
3-10
No. Positions
1
Languages Required
-
Remote Status
No Remote
Client Willing to Sponsor
No
Target Date
-
Degree
University - Bachelor's Degree/3-4 Year Degree
Major
Electronics, Electrical Engineer, computer engineering
Relocation Paid
No
Recruit From
Nationwide
Hiring Contact
Human Resources
Relationship
Contingency
Office Internal #
-Salary Details
Currency
US Dollars
Employment Type
Full Time/Direct Hire
Pay Type
Annual Salary
Pay Rate
157000-180000
Other Compensation
-
Show Salary on Job Board
YesClient Fee and Guarantee Terms
Client Fee Percentage
25
Guarantee Terms
30-, 60-, 90-day
Money Back
Yes
Fee Based on * Unfulfilled replacements could result in a refund of the candidate-side fee
SalaryJob Description
Job Description

Senior Analog Design & Layout Engineer (Microelectronic Commons) - Job Order 3539

Location: Los Angeles, CA

US citizenship or Permanent Residency required

$157K to $180K

The Opportunity

We are seeking a versatile Analog Design and Layout Engineer to join a premier microelectronics hub. This role is unique: you will function as a technical consultant for external customers, a mentor for advanced circuit design courses, and a key contributor to funded research. If you enjoy the intersection of hands-on physical layout and academic innovation-moving from schematic capture to tape-out across diverse process technologies-this is your ideal environment.

Key Responsibilities
" Technical Consulting & Design Support: Partner with external customers to develop high-performance analog or digital circuit designs. You will provide expert guidance on schematic capture, simulation, and layout implementation.

" Multi-Process Expertise: Navigate and implement designs across a variety of technologies, including CMOS, BiCMOS, and III-V, ensuring strict compliance with foundry design rules

" Academic & Research Integration: Support specialized "tape-out" curriculum by demonstrating advanced layout techniques and troubleshooting design-flow bottlenecks for students.

" Full Lifecycle Verification: Lead efforts in post-layout simulation, parasitic extraction, and layout verification (DRC/LVS) for high-impact research projects.

" Collaborative Documentation: Author technical design reports and layout closure documentation for both industry partners and academic stakeholders.

Qualifications

Required Qualifications

" Education: Bachelor's, Master's, or PhD in Electrical Engineering or a related technical field.

" Experience: Minimum 3+ years of professional experience in analog circuit design and/or physical layout.

" Tooling: Mastery of industry-standard CAD environments (e.g., Cadence Virtuoso, SPICE simulators, or Mentor Graphics).

" Verification: Deep understanding of layout verification methodologies and parasitic extraction.

" Communication: Exceptional interpersonal skills; ability to translate complex technical concepts for both customers and students.
Preferred Skills

" Experience with device-level, electromagnetic, or photonic component simulations.

" Prior experience in a teaching, tutoring, or workshop-led environment.

Why is This a Great Opportunity

This is part of the Microeletronics Commons effort to bring back integrated circuit design to the USA. Multple regions including academia and industry are working jointly to achieve this goal.

Private Notes to Members
Comments

This is an amazing program and this individual will be working with some of the brightest semiconductor mines in the country. A major benefit is after 2 years of employment tuition free courses will be available to the individual AND/OR FAMILY MEMBERS. This is a big savings if the person wants to pursue advanced degrees or if they have children about to enter college.